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Renesas Electronics /R7FA2A1AB /GPT161 /GTPBR

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Interpret as GTPBR

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0GTPBR0Reserved

Description

General PWM Timer Cycle Setting Buffer Register

Fields

GTPBR

Cycle Setting Buffer Register
Reserved

These bits are read as 0000000000000000. The write value should be 0000000000000000.

Links

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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data